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Olivetti · M

Olivetti M300-30

1992–1993 · Architecture: i486SX

25 MHz i486SX desktop with VLSI VL82C486 chipset and integrated WD90C31 video.

PartialImplemented in BluMach

History

The M300-30 is the 25 MHz i486SX version of this 1992–1993 M300 platform. It shares its board, firmware and peripherals with the M300-30P, which has a DX2/50; BluMach offers them as two machines so that each has its own processor.

Hardware

Processor
Intel i486SX/25
Memory
4/8/12/20/24/36 MB
Chipset
VLSI VL82C486
Video
Integrated Western Digital WD90C31, 1 MB
Input and output
PC87311/87312 family; separate Olivetti 8042

Catalogue classification

Form factor
Desktop
Mobility
Stationary
Processor generation
i486 class
Graphics standard
VGA

Research

This page separates documented hardware facts, behavior observed in original firmware, and the current fidelity of BluMach emulation.

Architecture and memory

Evidence: documentation, reverse engineering and diagnostics

CPU and bus

25 MHz Intel i486SX. VLSI VL82C486 chipset, combining the memory and AT-bus controller.

Memory

4 to 36 MB (4, 8, 12, 20, 24 or 36 MB). With 4 MB, POST counts 640 KB base, 3072 KB extended and 384 KB dedicated: the 384 KB behind the hole between 640 KB and 1 MB are reserved for video and BIOS shadowing.

Video

Integrated Western Digital WD90C31 VGA with 1 MB. Its video BIOS, OVC 1.09, takes the lower half of the ROM.

Storage

PC87311/87312-family Super I/O (floppy, serial and parallel) and a buffered IDE interface. The BIOS table adds types 17 to 26 for IDE disks, including type 17 (805/4/26, 40 MB) and type 18 (776/8/33, 100 MB).

BIOS and firmware

Evidence: observed in preserved firmware and boot testing

Known revisions

Three 128 KB ROMs with the same OVC 1.09 video BIOS are preserved: Diagnostics 1.03 (09/24/92), 1.04 (11/05/92) and 2.00 (02/22/93). The BIOS reads the bus speed (25 or 33 MHz) and the Super I/O address from a board register, which it opens with keyboard-controller command 8Bh.

Emulation status

Evidence: current BluMach status; not necessarily a description of the original circuit

Verified

Diagnostics 1.04 has completed POST, CPU, cache, memory, keyboard, RTC and protected-mode tests, booted MS-DOS 5.00 and retained the calendar. At 4 MB, memory is accounted as 640 KB base + 3072 KB extended + 384 KB dedicated = 4096 KB.

Pending or approximate

Partial bootable emulation. The VL82C486 is an initial model; the WD90C31 uses the compatible WD90C30 core and the PC87311/87312 is approximated with PC873xx. The board configuration register, from which the BIOS reads the bus speed and the Super I/O address, has been reconstructed from the disassembly. The other documented RAM configurations and more software remain to be validated.

Sources

Sources and traceability

Evidence: primary sources and research notes

Machine-translated and checked with several tools. Spotted a mistake? Let me know.